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Espressif Systems /ESP32-P4 /SOC_ETM /TASK_ST6

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Interpret as TASK_ST6

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PDMA_AXI_TASK_IN_START_CH2_ST)PDMA_AXI_TASK_IN_START_CH2_ST 0 (PDMA_AXI_TASK_OUT_START_CH0_ST)PDMA_AXI_TASK_OUT_START_CH0_ST 0 (PDMA_AXI_TASK_OUT_START_CH1_ST)PDMA_AXI_TASK_OUT_START_CH1_ST 0 (PDMA_AXI_TASK_OUT_START_CH2_ST)PDMA_AXI_TASK_OUT_START_CH2_ST 0 (PMU_TASK_SLEEP_REQ_ST)PMU_TASK_SLEEP_REQ_ST 0 (DMA2D_TASK_IN_START_CH0_ST)DMA2D_TASK_IN_START_CH0_ST 0 (DMA2D_TASK_IN_START_CH1_ST)DMA2D_TASK_IN_START_CH1_ST 0 (DMA2D_TASK_IN_DSCR_READY_CH0_ST)DMA2D_TASK_IN_DSCR_READY_CH0_ST 0 (DMA2D_TASK_IN_DSCR_READY_CH1_ST)DMA2D_TASK_IN_DSCR_READY_CH1_ST 0 (DMA2D_TASK_OUT_START_CH0_ST)DMA2D_TASK_OUT_START_CH0_ST 0 (DMA2D_TASK_OUT_START_CH1_ST)DMA2D_TASK_OUT_START_CH1_ST 0 (DMA2D_TASK_OUT_START_CH2_ST)DMA2D_TASK_OUT_START_CH2_ST 0 (DMA2D_TASK_OUT_DSCR_READY_CH0_ST)DMA2D_TASK_OUT_DSCR_READY_CH0_ST 0 (DMA2D_TASK_OUT_DSCR_READY_CH1_ST)DMA2D_TASK_OUT_DSCR_READY_CH1_ST 0 (DMA2D_TASK_OUT_DSCR_READY_CH2_ST)DMA2D_TASK_OUT_DSCR_READY_CH2_ST

Description

Tasks trigger status register

Fields

PDMA_AXI_TASK_IN_START_CH2_ST

Represents PDMA_AXI_task_in_start_ch2 trigger status.\0: Not triggered\1: Triggered
PDMA_AXI_TASK_OUT_START_CH0_ST

Represents PDMA_AXI_task_out_start_ch0 trigger status.\0: Not triggered\1: Triggered
PDMA_AXI_TASK_OUT_START_CH1_ST

Represents PDMA_AXI_task_out_start_ch1 trigger status.\0: Not triggered\1: Triggered
PDMA_AXI_TASK_OUT_START_CH2_ST

Represents PDMA_AXI_task_out_start_ch2 trigger status.\0: Not triggered\1: Triggered
PMU_TASK_SLEEP_REQ_ST

Represents PMU_task_sleep_req trigger status.\0: Not triggered\1: Triggered
DMA2D_TASK_IN_START_CH0_ST

Represents DMA2D_task_in_start_ch0 trigger status.\0: Not triggered\1: Triggered
DMA2D_TASK_IN_START_CH1_ST

Represents DMA2D_task_in_start_ch1 trigger status.\0: Not triggered\1: Triggered
DMA2D_TASK_IN_DSCR_READY_CH0_ST

Represents DMA2D_task_in_dscr_ready_ch0 trigger status.\0: Not triggered\1: Triggered
DMA2D_TASK_IN_DSCR_READY_CH1_ST

Represents DMA2D_task_in_dscr_ready_ch1 trigger status.\0: Not triggered\1: Triggered
DMA2D_TASK_OUT_START_CH0_ST

Represents DMA2D_task_out_start_ch0 trigger status.\0: Not triggered\1: Triggered
DMA2D_TASK_OUT_START_CH1_ST

Represents DMA2D_task_out_start_ch1 trigger status.\0: Not triggered\1: Triggered
DMA2D_TASK_OUT_START_CH2_ST

Represents DMA2D_task_out_start_ch2 trigger status.\0: Not triggered\1: Triggered
DMA2D_TASK_OUT_DSCR_READY_CH0_ST

Represents DMA2D_task_out_dscr_ready_ch0 trigger status.\0: Not triggered\1: Triggered
DMA2D_TASK_OUT_DSCR_READY_CH1_ST

Represents DMA2D_task_out_dscr_ready_ch1 trigger status.\0: Not triggered\1: Triggered
DMA2D_TASK_OUT_DSCR_READY_CH2_ST

Represents DMA2D_task_out_dscr_ready_ch2 trigger status.\0: Not triggered\1: Triggered

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data